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64 Mbit SPI Serial Dual I/O Flash
A Microchip Technology Company
SST25VF064C
Data Sheet
Program Security ID
The Program SID instruction programs one to 24 bytes of data in the user-programmable, Security ID
space. The device ignores a Program SID instruction pointing to an invalid or protected address, see
Table 7. Prior to the program operation, execute WREN.
To execute a Program SID operation, the host drives CE# low, sends the Program SID command cycle
(A5H), one address cycle, the data to be programmed, then drives CE# high. The programmed data
must be between 1 to 24 Bytes and in whole Byte increments. To determine the completion of the inter-
nal, self-timed Program SID operation, poll the BUSY bit in the software status register, or wait T PSID
for the completion of the internal self-timed Program SID operation.
Table 7: Program Security ID
Program Security ID
Pre-Programmed at factory
User Programmable
Address Range
00H – 07H
08H – 1FH
T7.0
25036
Read-Status-Register (RDSR)
The Read-Status-Register (RDSR) instruction allows reading of the status register. The status register
may be read at any time even during a Write (Program/Erase) operation. When a Write operation is in
progress, the Busy bit may be checked before sending any new commands to assure that the new
commands are properly received by the device. CE# must be driven low before the RDSR instruction is
entered and remain low until the status data is read. Read-Status-Register is continuous with ongoing
clock cycles until it is terminated by a low to high transition of the CE#. See Figure 16 for the RDSR
instruction sequence.
CE#
MODE 3
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
SCK
SI
MODE 0
MSB
05
SO
HIGH IMPEDANCE
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
MSB
Status
Register Out
1392 F17.0
Figure 16: Read-Status-Register (RDSR) Sequence
?2011 Silicon Storage Technology, Inc.
21
DS25036A
06/11
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